/* * Interrupt sources for the STM23L432 micro-controller */ ENUM [ SysTick, WWDG_IRQ, PVD_PVM_IRQ, TAMP_STAMP_IRQ, RTC_WKUP_IRQ, FLASH_IRQ, RCC_IRQ, EXTI0_IRQ { ENUM [ PA0 { #include }, PB0 { #include }, PC0 { #include }, PD0 { #include }, PE0 { #include }, PF0 { #include }, PG0 { #include }, PH0 { #include }, PI0 { #include } ] PIN; }, EXTI1_IRQ { ENUM [ PA1 { #include }, PB1 { #include }, PC1 { #include }, PD1 { #include }, PE1 { #include }, PF1 { #include }, PG1 { #include }, PH1 { #include }, PI1 { #include } ] PIN; }, EXTI2_IRQ { ENUM [ PA2 { #include }, PB2 { #include }, PC2 { #include }, PD2 { #include }, PE2 { #include }, PF2 { #include }, PG2 { #include }, PH2 { #include }, PI2 { #include } ] PIN; }, EXTI3_IRQ { ENUM [ PA3 { #include }, PB3 { #include }, PC3 { #include }, PD3 { #include }, PE3 { #include }, PF3 { #include }, PG3 { #include }, PH3 { #include }, PI3 { #include } ] PIN; }, EXTI4_IRQ { ENUM [ PA4 { #include }, PB4 { #include }, PC4 { #include }, PD4 { #include }, PE4 { #include }, PF4 { #include }, PG4 { #include }, PH4 { #include }, PI4 { #include } ] PIN; }, DMA1_Channel1_IRQ, DMA1_Channel2_IRQ, DMA1_Channel3_IRQ, DMA1_Channel4_IRQ, DMA1_Channel5_IRQ, DMA1_Channel6_IRQ, DMA1_Channel7_IRQ, ADC1_IRQ, CAN1_TX_IRQ, CAN1_RX0_IRQ, CAN1_RX1_IRQ, CAN1_SCE_IRQ, EXTI9_5_IRQ { ENUM [ PA5 { #include }, PB5 { #include }, PC5 { #include }, PD5 { #include }, PE5 { #include }, PF5 { #include }, PG5 { #include }, PH5 { #include }, PI5 { #include }, NONE ] PINON5 = NONE; ENUM [ PA6 { #include }, PB6 { #include }, PC6 { #include }, PD6 { #include }, PE6 { #include }, PF6 { #include }, PG6 { #include }, PH6 { #include }, PI6 { #include }, NONE ] PINON6 = NONE; ENUM [ PA7 { #include }, PB7 { #include }, PC7 { #include }, PD7 { #include }, PE7 { #include }, PF7 { #include }, PG7 { #include }, PH7 { #include }, PI7 { #include }, NONE ] PINON7 = NONE; ENUM [ PA8 { #include }, PB8 { #include }, PC8 { #include }, PD8 { #include }, PE8 { #include }, PF8 { #include }, PG8 { #include }, PH8 { #include }, PI8 { #include }, NONE ] PINON8 = NONE; ENUM [ PA9 { #include }, PB9 { #include }, PC9 { #include }, PD9 { #include }, PE9 { #include }, PF9 { #include }, PG9 { #include }, PH9 { #include }, PI9 { #include }, NONE ] PINON9 = NONE; }, TIM1_BRK_TIM15_IRQ, TIM1_UP_TIM16_IRQ, TIM1_TRG_COM_IRQ, TIM1_CC_IRQ, TIM2_IRQ, I2C1_EV_IRQ, I2C1_ER_IRQ, SPI1_IRQ, USART1_IRQ { ENUM [ TXE, CTS, TC, RXNE, ORE, IDLE, PE, LBD, NF, FE ] EVFLAG[]; }, USART2_IRQ { ENUM [ TXE, CTS, TC, RXNE, ORE, IDLE, PE, LBD, NF, FE ] EVFLAG[]; }, EXTI15_10_IRQ { ENUM [ PA10 { #include }, PB10 { #include }, PC10 { #include }, PD10 { #include }, PE10 { #include }, PF10 { #include }, PG10 { #include }, PH10 { #include }, PI10 { #include }, NONE ] PINON10 = NONE; ENUM [ PA11 { #include }, PB11 { #include }, PC11 { #include }, PD11 { #include }, PE11 { #include }, PF11 { #include }, PG11 { #include }, PH11 { #include }, PI11 { #include }, NONE ] PINON11 = NONE; ENUM [ PA12 { #include }, PB12 { #include }, PC12 { #include }, PD12 { #include }, PE12 { #include }, PF12 { #include }, PG12 { #include }, PH12 { #include }, NONE ] PINON12 = NONE; ENUM [ PA13 { #include }, PB13 { #include }, PC13 { #include }, PD13 { #include }, PE13 { #include }, PF13 { #include }, PG13 { #include }, PH13 { #include }, NONE ] PINON13 = NONE; ENUM [ PA14 { #include }, PB14 { #include }, PC14 { #include }, PD14 { #include }, PE14 { #include }, PF14 { #include }, PG14 { #include }, PH14 { #include }, NONE ] PINON14 = NONE; ENUM [ PA15 { #include }, PB15 { #include }, PC15 { #include }, PD15 { #include }, PE15 { #include }, PF15 { #include }, PG15 { #include }, PH15 { #include }, NONE ] PINON15 = NONE; }, RTC_Alarm_IRQ, SPI3_IRQ, TIM6_DAC_IRQ, TIM7_IRQ, DMA2_Channel1_IRQ, DMA2_Channel2_IRQ, DMA2_Channel3_IRQ, DMA2_Channel4_IRQ, DMA2_Channel5_IRQ, COMP_IRQ, LPTIM1_IRQ, LPTIM2_IRQ, USB_IRQ, DMA2_Channel6_IRQ, DMA2_Channel7_IRQ, LPUART1_IRQ { ENUM [ TXE, CTS, TC, RXNE, ORE, IDLE, PE, LBD, NF, FE ] EVFLAG[]; }, QUADSPI_IRQ, I2C3_EV_IRQ, I2C3_ER_IRQ, SAI1_IRQ, SWPMI1_IRQ, TSC_IRQ, RNG_IRQ, FPU_IRQ, CRS_IRQ ] SOURCE;