; ; Trampoline Test Suite ; ; Trampoline Test Suite is copyright (c) IRCCyN 2005-2007 ; Trampoline Test Suite is protected by the French intellectual property law. ; ; This program is free software; you can redistribute it and/or ; modify it under the terms of the GNU General Public License ; as published by the Free Software Foundation; version 2 ; of the License. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. ; ;============================================================================== ; CONSTANTS DEFINITIONS TITLE "Multicore SMP spinlocks with MPC5643L" &srcDir="~~~~" ; Location of the .o files &appPath="~~~~" ; Script directory &exePath="&appPath/spinlock_exe.elf" ; Path to the executable &ortiPath="&appPath/spinlock/spinlock.orti" ; Path to the orti file ;============================================================================== ; FLASH MEMORY PROGRAMMING DIALOG.YESNO "Program flash memory now?" LOCAL &progflash ENTRY &progflash IF &progflash ( ;prepare flash programming DO ~~/demo/powerpc/flash/mpc5xxx.cmm PREPAREONLY ;activate flash programming (unused sectors are erased) FLASH.ReProgram ALL /Erase ;load file DATA.LOAD.ELF "&exePath" E:0x0--0xEFFFFF ;commit data to Flash FLASH.ReProgram off ) ;============================================================================== ; SIMULATOR CONFIG ;debugger setup SYnch.RESet SYStem.RESet Break.Delete SYStem.BdmClock 4.MHz ;detect processor SYStem.CPU MPC5643L SYStem.Option.WATCHDOG OFF ;setup for SMP debugging SYStem.CONFIG.CORE 1. 1. CORE.ASSIGN 1 2 ;trace configuration IF POWERNEXUS() ( ;set port mode to MDO4 (12 MDO pins only supported by 257 MAPBGA package) NEXUS.PortSize MDO4 Trace.METHOD Analyzer Trace.AutoArm ON ) ELSE IF SIMULATOR() ( SYStem.Option.DisMode VLE ; configure instruction set simulator for VLE ) IF !SIMULATOR() ( ;enable real time memory access via NEXUS block SYStem.MemAccess NEXUS ) ;halt on reset SYStem.Up IF POWERNEXUS() ( Trace.Init ) ;check if processor runs in DPM &nSSCM_STATUS_ADDR=0xC3FD8000 &nSSCM_STATUS_LSM=0x8000 &nSSCM_STATUS_VAL=Data.Word(ANC:&nSSCM_STATUS_ADDR) IF (&nSSCM_STATUS_VAL&&nSSCM_STATUS_LSM)==&nSSCM_STATUS_LSM ( PRINT %ERROR "Processor configured to LSM. Demo aborted" ENDDO ) ;setup MMU for the loading of the application in RAM MMU.Set TLB1 0x1 0xC0000400 0x40000028 0x4000003F ;clear internal SRAM Data.Set EA:0x40000000--0x4000FFFF %Quad 0x0 ;load application Data.LOAD.ELF "&exePath" 0x40000000--0x4000FFFF /WORD /SOURCEPATH "&srcDir/" ;Reset the MMU entry MMU.Set TLB1 0x1 0x0 0x0 0x0 ;set debug mode to HLL debugging Mode.Hll ;============================================================================== ; CODE EXECUTION ; Go main, the core0's MMU has to be initialized before opening ORTI windows. Core.select 0 go main ;;stop core 1 on activation ;Core.Select 1 ;break; ;Core.Select 0 ;============================================================================== ; ORTI CONFIGURATION ; Load ORTI File Task.ORTI "&ortiPath" ; Clear windows WinCLEAR ; Open some ORTI windows WinPOS 0x0 0x0 0x75 0x1 ; Task.dos ; Trace32's selected Core Task.d_vs_os ; All cores WinPOS 0x0 0x8 0x75 0x1 Task.dtask WinPOS 0x0 0x10 0x75 0x1 Task.dstack WinPOS 0x0 0x18 0x75 0x1 Task.dalarm WinPOS 0x0 0x20 0x75 0x1 Task.d_vs_counter WinPOS 0x0 0x28 0x75 0x1 Task.d_vs_spinlock WinPOS 0x0 0x30 0x75 0xc Task.stack ;============================================================================== ; OTHER WINDOWS ; Core0 Code execution WinPOS 0x79 0x0 0x45 0x1a List.auto /CORE 0 ; Core0 Registers WinPOS 0xc2 0x0 0x4c 0x1c Register.view /CORE 0 ; Core1 Code execution WinPOS 0x79 0x20 0x45 0x1a List.auto /CORE 1 ; Core0 Registers WinPOS 0xc2 0x20 0x4c 0x1c Register.view /CORE 1 ;;Usefull things to debug ;Tronchip.set IRPT ON ; Break on interrupt entry ;Tronchip.set RET ON ; Break on return from interrupt ENDDO